Mainframes, super computers, mass storage systems, workstations and very high-resolution display subsystems are frequently connected together to facilitate file and print sharing. Common networks and channels used for these types of connections oftentimes introduce communications bottle necking, especially in cases where the data is in a large file format typical of graphically-based applications.
There are two basic types of data communications connections between processors, and between a processor and peripherals. A “channel” provides a direct or switched point-to-point connection between communicating devices. The channel's primary task is merely to transport data at the highest possible data rate with the least amount of delay. Channels typically perform simple error correction in hardware. A “network,” by contrast, is an aggregation of distributed nodes (e.g., workstations, mass storage units) with its own protocol that supports interaction among these nodes. Typically, each node contends for the transmission medium, and each node must be capable of recognizing error conditions on the network and must provide the error management required to recover from the error conditions.
One type of communications interconnect that has been developed is fibre channel (FC). The fibre channel protocol was developed and adopted by the American National Standards Institute (ANSI). See, e.g., Fibre Channel Physical and Signaling Interface, Revision 4.3, ANSI (1994) for a detailed discussion of the fibre channel standard. Briefly, fibre channel is a switched protocol that allows concurrent communication among workstations, super computers and various peripherals. The total network bandwidth provided by fibre channel is on the order of a terabit per second. Fibre channel is capable of full-duplex transmission of frames at rates exceeding 1 gigabit per second. It is also able to transport commands and data according to existing protocols such as Internet protocol (IP), Small Computer System Interface (SCSI), High Performance Parallel Interface (HIPPI) and Intelligent Peripheral Interface (IPI) over both optical fibre and copper cable.
The fibre channel industry indicates that the information explosion and the need for high-performance communications for server-to-storage and server-to-server networking have been the focus of much attention during the 90s. Performance improvements in storage, processors, and workstations, along with the move to distributed architectures such as client/server, have spawned increasingly data-intensive and high-speed networking applications. The interconnect between these systems and their input/output devices demands a new level of performance in reliability, speed, and distance. Fibre channel, a highly-reliable, gigabit interconnect technology allows concurrent communications among workstations, mainframes, servers, data storage systems, and other peripherals using SCSI and IP protocols. It provides interconnect systems for multiple topologies that can scale to a total system bandwidth on the order of a terabit per second. Fibre channel delivers a new level of reliability and throughput. Switches, hubs, storage systems, storage devices, and adapters are among the products that are on the market today, providing the ability to implement a total system solution.
Information Technology (IT) systems frequently support two or more interfaces, and sharing a port and media makes sense. This reduces hardware costs and the size of the system, since fewer parts are needed. Fibre channel, a family of ANSI standards, is a common, efficient transport system supporting multiple protocols or raw data using native fibre channel guaranteed delivery services. Profiles define interoperable standards for using fibre channel for different protocols or applications.
Fibre channel, a channel/network standard, contains network features that provide the required connectivity, distance, and protocol multiplexing. It also supports traditional channel features for simplicity, repeatable performance, and guaranteed delivery. Fibre channel also works as a generic transport mechanism.
Fibre channel architecture represents a true channel/network integration with an active, intelligent interconnection among devices. A fibre channel port provides management of a simple point-to-point connection. The transmission is isolated from the control protocol, so that point-to-point links, arbitrated loops, and switched topologies are used to meet the specific needs of an application. The fabric is self-managing. Nodes do not need station management, which greatly simplifies implementation.
FIG. 1 illustrates a variable-length frame 11 as described by the fibre channel standard. The variable-length frame 11 comprises a 4-byte start-of-frame (SOF) indicator 12, which is a particular binary sequence indicative of the beginning of the frame 11. The SOF indicator 12 is followed by a 24-byte header 14, which generally specifies, among other things, the frame source address and destination address as well as whether the frame 11 is either control information or actual data. A field of variable-length data 16 follows the header 14. The length of the data 16 is 0 to 2112 bytes. The data 16 is followed successively by a 4-byte CRC (cyclical redundancy check) code 17 for error detection, and by a 4 byte end-of-frame (EOF) indicator 18. The frame 11 of FIG. 1 is much more flexible than a fixed frame and provides for higher performance by accommodating the specific needs of specific applications.
FIG. 2 illustrates a block diagram of a representative fibre channel architecture in a fibre channel network 100. A workstation 120, a mainframe 122 and a super computer 124 are interconnected with various subsystems (e.g., a tape subsystem 126, a disk subsystem 128, and a display subsystem 130) via a fibre channel fabric 110 (i.e., fibre channel switch). The fabric 110 is an entity that interconnects various node-ports (N-ports) 140 and their associated workstations, mainframes and peripherals attached to the fabric 110 through the F-ports 142. The essential function of the fabric 110 is to receive frames of data from a source N-port and, using a first protocol, route the frames to a destination N-port. In a preferred embodiment, the first protocol is the fibre channel protocol.
Essentially, the fibre channel is a channel-network hybrid, containing enough network features to provide the needed connectivity, distance and protocol multiplexing, and enough channel features to retain simplicity, repeatable performance and reliable delivery. Fibre channel allows for an active, intelligent interconnection scheme, known as a “fabric,” or fibre channel switch to connect devices. The fabric includes a plurality of fabric-ports (F-ports) that provide for interconnection and frame transfer between a plurality of node-ports (N-ports) attached to associated devices that may include workstations, super computers and/or peripherals. The fabric has the capability of routing frames based upon information contained within the frames. The N-port manages the simple point-to-point connection between itself and the fabric. The type of N-port and associated device dictates the rate that the N-port transmits and receives data to and from the fabric. Transmission is isolated from the control protocol so that different topologies (e.g., point-to-point links, rings, multidrop buses, cross point switches) can be implemented.
Switch fabrics that support protocols such as fibre channel are generally frame-based and of variable length such that data processing and transfer can be conducted as described, for example in FIGS. 1 and 2 described above. However, there are also switch fabrics that are cell-based that include fixed length data “packets” such as that described for example in U.S. Pat. No. 5,781,549, the content of which is incorporated herein by reference in its entirety. Cell-based fixed length switches are often utilized for WAN and ATM applications due to their adaptability for the same. Cell-based switches often are associated with a high-speed network interface. This may be used for a high-speed port, such as an ATM port or other high-speed protocol connection. The '549 patent describes a packet switch wherein variable length Ethernet frames are segmented into cells for fixed length cell switching. The cells are then reassembled into the original frame before exiting the switch. Once the frame has been segmented into cells, the cells can be sent through the switch to the destination port where the cells are reassembled into the original Ethernet frame format.
For example, the '549 switch provides a certain number of Ethernet ports and a high-speed network interface. The Ethernet ports are grouped into sets of ports, each set being associated with a packet processing unit. The packet processing units are responsible for receiving Ethernet packets, segmenting them into fixed-size cells and conveying them on a backplane cell bus incorporated within the work group switch.
Each packet processing unit in the switch has associated with it a packet buffer memory. Each packet processing unit monitors traffic on the cell bus and collects all the cells transmitted thereon for reassembly into Ethernet packets in the packet buffer memory. The packet buffer memory is a shared memory to the extent that it relates to the group of eight ports associated with a single packet processing unit, however the packet buffer memories are distributed to the extent that there is one dedicated for each of the packet processing units. Each received Ethernet packet is reassembled in each packet buffer memory because the destination port for the received packet may be one or several ports associated with one or several of the packet processing units.
Also coupled to the cell bus is a switch packet routing controller which monitors cell traffic on the cell bus. For each packet that is received, the switch packet routing controller analyzes the packet to determine which ports, if any, the packet is to be output from. The switch packet routing controller propagates a control cell on the cell bus directing each of the packet processing units how to “route” each packet being assembled thereby. The switch packet routing controller also has associated therewith a routing table memory that collects information on received packets for creating a routing table associating each port with addresses to which it is in communication.
While cell-based switches can be used successfully in WAN and ATM type of applications, use of such switch fabrics can be problematic when the same are connected to frame-based protocols such as Fibre Channel or other SAN applications. Namely, in Fibre Channel frames, the header contains routing information, but no length info. Length is determined by the EOF primitive at the end of the frame, and can be, for example, from 36 to 2148 bytes. The switch does not really parse any higher level protocol, so does not look for lengths that might be embedded in the payload. If an entire FC frame is buffered to determine the frame (i.e., packet) length to insert into the first cell prior to transmission of the frame, the latency would be undesirable (for example ˜20 μs @ 1 Gbps). Thus, it has been difficult to use cell-based switch fabrics for Fibre Channel and other similar protocols since the entire Ethernet frame must be received and buffered before segmentation may take place. Moreover, Fibre Channel protocol (and other frame based protocols) typically do not include frame length explicitly. In a crossbar based frame switch, connection duration typically must be specified at the time a connection is established. This creates problems when the two fabrics are utilized together.